DFT Engineer

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Description

DFT Engineer

Singapore Office, Basic : >5k, with AWS and VB - Perm role. Local Singaporeans priority, foreigners welcome to apply.

To apply, register onsite at www.cushiejobs.com, submit in the copy of your resume and photo, will revert to you soonest for a discussion of the role. Thank you.

World's leading provider of All Programmable FPGAs, SoCs and 3D ICs. These industry-leading devices are coupled with a next-generation design environment and IP to serve a broad range of customer needs, from programmable logic to programmable systems integration. Our All Programmable devices underpin today's most advanced electronics.

Among the broad range of end markets we serve are:

Aerospace/Defense

Automotive

Broadcast

Consumer

High Performance Computing

Industrial / Scientific / Medical (ISM)

Wired

Wireless

This is an exciting opportunity to work in the product verification team. The candidate will have an opportunity to work on Scan, MBIST verification and Silicon bring up on the state of the art IPs in 7nm process, whose key responsibilities include but are not limited to,

Responsible for developing, implementing and verifying DFT schemes on hard-IPs in FPGAs.

Responsible for developing and implementing techniques to test digital logic, using Scan Compression, Stuck-at, Transition and Path-Delay fault models

Responsible for testing other parts of the design, including memory, mixed-signal, I/Os, custom LBISTs & MBISTs, 1149.1 JTAG and IJTAG

Assist in Diagnosis and Yield enhancement through product lifecycle

Qualifications:

BSc/MSc Electrical & Electronics Engineering with relevant logic design/test background

3-5 years' work experience as a DFT engineer

Experience in DFT implementation including Scan and Scan Compression at IP and SoC level

Proficient in logic design using Verilog and experience in synthesis and STA

Experience in developing test benches and simulation in RTL/GATE/SDF environments

Good communication skill and works well in a group environment that spans across continents

Experience with DFT tools, ATPG (Stuck-At, At-Speed, Path-Delay), scan compression. Knowledge of MBIST is a plus.

Knowledge of FPGA synthesis and design flow is a plus

Perl, shell scripting skills is a must

Keen to apply for this role?

Please email a copy of your resume, photo, reasons for leaving, details of your current/ last drawn and expected salary to : socrates3142@gmail.com

Regret to notify that only shortlisted candidates will proceed for the interview and will be contacted by our recruiters for the arrangement for the interview. 

Thank you.